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Field-programmable gate array
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#	Item
731	A case study of FPGA mappers optimality Add to Reading List Source URL: cadlab.cs.ucla.edu Language: English - Date: 2007-02-12 14:27:19 Electronic design Digital electronics Integrated circuits Field-programmable gate array Logic synthesis Xilinx Logic optimization Application-specific integrated circuit Algorithm Electronic engineering Electronics Electronic design automation
732	13th International Symposium on Spatial and Temporal Databases (SSTD) Munich, Germany, August 21-23, 2013 Stream-Mode FPGA Acceleration of Complex Pattern Trajectory Querying Roger Moussalli1 , Marcos R. Vieira2 , Walid Add to Reading List Source URL: www.cs.ucr.edu Language: English - Date: 2013-06-26 13:58:42 Software engineering Computer languages Relational database management systems Pattern matching SQL Extensible Storage Engine Field-programmable gate array Join Computing Data management Query languages
733	Stratix IV GX FPGA Development Board Reference Manual 101 Innovation Drive San Jose, CA[removed]www.altera.com Add to Reading List Source URL: www.altera.com Language: English - Date: 2012-08-21 21:54:10 Computer buses Embedded systems Field-programmable gate array Altera Joint Test Action Group PCI Express Conventional PCI Nvidia Ion Complex programmable logic device Electronic engineering Computer hardware Electronics
734	Extended Kalman Filter Reference Design Datasheet Description Features Add to Reading List Source URL: www.altera.com Language: English - Date: 2014-06-03 19:02:10 Control theory Linear filters Estimation theory Kalman filter Radar tracker Field-programmable gate array Altera Nios embedded processor Electronic engineering Robot control Signal processing
735	I/O and High Speed I/O in Arria 10 Devices Add to Reading List Source URL: www.altera.com Language: English - Date: 2014-08-15 08:54:31 Electromagnetism High-speed transceiver logic Low-voltage differential signaling Altera LVCMOS Field-programmable gate array Arria Differential signaling Electronics Electronic engineering Computer buses
736	The RAMP Architecture & Description Language Greg Gibeling, Andrew Schultz & Krste Asanovi´c RAMP Gateware Group, UC Berkeley & MIT CSAIL {gdgib & alschult}@eecs.berkeley.edu, [removed] January 17, 2006 Add to Reading List Source URL: www.eecs.berkeley.edu Language: English - Date: 2006-12-03 11:40:21 Latency Electronic engineering Field-programmable gate array Verilog
737	AN 346: Using the Nios Development Board Configuration Controller Reference Designs Add to Reading List Source URL: www.altera.com Language: English Nios II Altera Field-programmable gate array Nios embedded processor Complex programmable logic device Embedded system Flash memory Booting Electronic engineering Computer hardware Electronics
738	Reset Manager[removed] Add to Reading List Source URL: www.altera.com Language: English Electronic engineering Joint Test Action Group Field-programmable gate array Reset Power-on reset Watchdog timer Embedded systems Computing Electronics
739	Quartus II Incremental Compilation for Hierarchical and Team-Based Design Add to Reading List Source URL: www.altera.com Language: English - Date: 2014-08-12 19:20:20 Altera Quartus Netlist Field-programmable gate array Logic synthesis Design closure Disk partitioning Partition Altera Physical design Electronic engineering Electronic design automation Electronic design
740	White Paper A Flexible Architecture for Fisheye Correction in Automotive Rear-View Cameras Introduction Fisheye cameras are finding an increasing number of applications in automobile rear-view imaging systems due to thei Add to Reading List Source URL: www.altera.com Language: English - Date: 2013-12-02 03:56:37 Digital photography Fisheye lens Computer programming Framebuffer Distortion Bilinear interpolation Lookup table Field-programmable gate array Pixel Image processing Computing Computer graphics

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